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| controllers:st_microelectronics [2025/02/05 21:45] – [Cortex Mx] heinz | controllers:st_microelectronics [2025/02/06 13:12] (current) – [Cortex Mx] heinz |
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| The [[http://www.st.com/stm32|STM32]] family of 32‑bit Flash microcontrollers based on the ARM Cortex™‑M processor is designed to offer new degrees of freedom to MCU users. It offers 32‑bit product range that combines high performance, real‑time capabilities, digital signal processing, and low‑power, low‑voltage operation, while maintaining full integration and ease of development. The unparalleled and large range of STM32 devices, based on an industry-standard core and accompanied by a vast choice of tools and software, makes this family of products the ideal choice, both for small projects and for entire platform decisions. | The [[http://www.st.com/stm32|STM32]] family of 32‑bit Flash microcontrollers based on the ARM Cortex™‑M processor is designed to offer new degrees of freedom to MCU users. It offers 32‑bit product range that combines high performance, real‑time capabilities, digital signal processing, and low‑power, low‑voltage operation, while maintaining full integration and ease of development. The unparalleled and large range of STM32 devices, based on an industry-standard core and accompanied by a vast choice of tools and software, makes this family of products the ideal choice, both for small projects and for entire platform decisions. |
| *[[https://www.st.com/en/microcontrollers-microprocessors/stm32g4-series.html | STM32G4]] 32-bit Arm Cortex-M4 core @170 MHz with 3 different hardware accelerators. CAN FD :-); AES-256 encryption, | *[[https://www.st.com/en/microcontrollers-microprocessors/stm32g4-series.html | STM32G4]] 32-bit Arm Cortex-M4 core @170 MHz with 3 different hardware accelerators. CAN FD :-); AES-256 encryption. The STM32G4 Series combines a 32-bit Arm® Cortex®-M4 core (with FPU and DSP instructions) running at 170 MHz combined with 3 different hardware accelerators: ART Accelerator™, CCM-SRAM routine booster and mathematical accelerators. igly compatible with STM32F3 Series. [[https://www.st.com/resource/en/reference_manual/rm0440-stm32g4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf | (PDF)]] ST calls the CAN module FDCAN which is an implementation of [[https://www.bosch-semiconductors.com/products/ip-modules/can-ip-modules/m-can/ | Bosch M_CAN]]. It's main features |
| The STM32G4 Series combines a 32-bit Arm® Cortex®-M4 core (with FPU and DSP instructions) running at 170 MHz combined with 3 different hardware accelerators: ART Accelerator™, CCM-SRAM routine booster and mathematical accelerators. | * Conform with CAN protocol version 2.0 part A, B, and ISO 11898-1: 2015 |
| | * CAN FD with maximum 64 data bytes supported |
| | * CAN error logging |
| | * AUTOSAR and J1939 support |
| | * Improved acceptance filtering |
| | * Two receive FIFOs of three payloads each (up to 64 bytes per payload) |
| | * Separate signaling on reception of high priority messages |
| | * Configurable transmit FIFO/queue of three payloads (up to 64 bytes per payload) |
| | * Transmit event FIFO |
| | * Programmable loop-back test mode |
| | * Maskable module interrupts |
| | * Two clock domains: APB bus interface and CAN core kernel clock |
| | * Power-down support |
| * [[https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html | STM32MP1]] single or dual ARM Cortex-A7@650 MHz and Cortex-M4@209 MHz cores **M**ulti **P**rocessor architecture; digital and analog peripherals, security features, | * [[https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html | STM32MP1]] single or dual ARM Cortex-A7@650 MHz and Cortex-M4@209 MHz cores **M**ulti **P**rocessor architecture; digital and analog peripherals, security features, |
| * STM32MP157: Dual Cortex-A7 cores @ 650 MHz, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and 2 x CAN FD :-) | * STM32MP157: Dual Cortex-A7 cores @ 650 MHz, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and 2 x CAN FD :-) |
