====== CTU - Czech Technical University in Prague ======

There are many CAN bus related project implemented at
the [[http://www.fel.cvut.cz/en/ | Faculty of Electrical Engineering]]
of the [[http://www.fel.cvut.cz/en/ | Czech Technical University in Prague]]

===== CTU CAN FD =====

CTU CAN FD is a soft IP core whose development started at Czech Technical University. The core is usable in FPGA and ASIC implementations. It supports ISO and NON-ISO versions of CAN FD protocol and it is compliant with ISO 11898-1 2015. The core is open-source, see the licensing conditions on project page.

HW Features:
  * 2 - 8 TX buffers
  * FIFO-like RX buffer with configurable size
  * HW filtering of RX frames
  * Time-stamping (RX) and Time-triggered transmission (TX)
  * Variety of interrupts
  * Listen only mode, Restricted operation mode, Self test mode, Test Mode,
  * Support of ASIC manufacturing testability (DFT and memory testing)

Project pages:
  * [[https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core]]
Documentation and testing:
  * [[http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf | Datasheet]]
  * [[http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/System_Architecture.pdf | System Architecture]]
  * [[http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Testbench.pdf | Testbench documentation]]
  * [[https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/pipelines | Results of regression tests (includes ISO 16845 compliance tests)]]
  * [[https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top/pipelines | Results of automatic build by Xilinx Vivado and tests on Zynq-7000 MicroZed board]]

Integration with FPGA SoCs and boards:

  * Integration with Zynq-7000 system
    https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top

  * Integration with Intel EP4CGX15 based DB4CGX15 PCIe board
    https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd

  * Integration with Intel Cyclone V 5CSEMA4U23C6 based DE0-Nano-SoC Terasic board.
    https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd

Apart from the core itself, there are several related projects:
  * Emulation in mainline QEMU source tree. See [[https://www.qemu.org/docs/master/system/devices/can.html | QEMU CAN documentation]].
  * Socket CAN Linux driver is available from mainline. See [[https://docs.kernel.org/networking/device_drivers/can/ctu/ctucanfd-driver.html | Linux kernel CTU CAN FD documentation page]].
  * RTEMS RTOS CAN/CAN FD subsystem has been developed by CTU team and it includes CTU CAN FD support. See [[https://docs.rtems.org/docs/main/bsp-howto/can.html | RTEMS CAN/CAN FD subsystem documentation]].
  * NuttX RTOS includes initial CTU CAN FD support working with QEMU emulated PCI card. 
  * [[https://canbus.pages.fel.cvut.cz/ | The list of more CTU FEE CAN/CAN FD related projects]]

Usage:
  * The core has been used in several industry projects realized at: [[https://meas.fel.cvut.cz/ | Department of measurement]]
  * The core has been used in space missions and well as it is integrated into mas produced MCUs

===== OpenCores SJA-1000 FD Tol =====

[[https://opencores.org/ | OpenCores]] [[https://opencores.org/projects/can | SJA-1000]] controller modified to ignore CAN FD frames which allows it to coexists and send frames on network with CAN FD traffic. The core is packed as a Xilinx Vivado component.

Project pages: https://gitlab.fel.cvut.cz/canbus/zynq/sja1000-fdtol