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controllers:renesas [2014/10/29 21:53] – [RH family] RH850/P1M heinzcontrollers:renesas [2017/01/04 18:15] – [RH family] heinz
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 ===== 32 bit Controllers ===== ===== 32 bit Controllers =====
  
-  * [[http://www.renesas.com/products/mpumcu/v850/v850e2fx/v850e2fx4l/index.jsp|V850E2/Fx4-L]], @48 to 64 Mhz, 256KiB  to 1.5MiB FLASH, AUTOSAR, 20 different chips, very low power, selective CAN wake-up \\ [[http://documentation.renesas.com/doc/DocumentServer/R01UH0114ED0100_V850E2.pdf|Manual (pdf)]] 
  
 +==== R-Car ====
 +Generation 2
 +  * R-Car H2
 +  * R-Car M2
 +  * R-Car E2
 +Generation 3
 +  * R-Car H3  2 x CAN/CANFD
 +  * R-Car M3
 +
 +
 +==== S7G2 ====
 +
 +32-bit ARM® Cortex®-M4 based microcontroller, 
 +2-channel CAN compliant with ISO11898-1,
 +32 mailboxes/channel
 +
 +S7G2 2 x CAN,
 +S3A7 1 x RCAN,
 +S124  1 x RCAN
 ==== RH family ==== ==== RH family ====
  
 One member of the RH family will be the first containing the new CAN FD :-) module. One member of the RH family will be the first containing the new CAN FD :-) module.
 +
 +  * RH850/V1R-M  320-MHz RISC MCU, 2-MiB flash, 2-MiB RAM, on-chip DSP core, 6 x CAN FD (the Renesas  RS-CANFD complies with the ISO 11898-1:2016), developed for automotive radar ADAS solutions.
  
   * [[http://am.renesas.com/products/mpumcu/rh850/rh850p1x/rh850p1m/index.jsp| RH850/P1M]] low power consumption, up to 2 MB flash and up to 128 KB RAM, enhanced motor control timer, up to three RS-CAN interfaces, digital interface for sensor such as SENT and PSI5, safety functions such as lockstep CPU, ECC, BIST (Built-in Self Test) and ECM (Error Control Module), suitable for chassis systems.   * [[http://am.renesas.com/products/mpumcu/rh850/rh850p1x/rh850p1m/index.jsp| RH850/P1M]] low power consumption, up to 2 MB flash and up to 128 KB RAM, enhanced motor control timer, up to three RS-CAN interfaces, digital interface for sensor such as SENT and PSI5, safety functions such as lockstep CPU, ECC, BIST (Built-in Self Test) and ECM (Error Control Module), suitable for chassis systems.
-==== RX family ==== 
  
 +   * RH850/P1H-C (R7F701372) 2 or 3 ch. M_CAN + 1 x MTTCAN :-)
 +==== RX family ====
 +  * [[http://www.renesas.eu/products/mpumcu/rx/rx200/index.jsp| RX200]] Low power 32 bit family, 32-bit RXv2 CPU core @54 MHz,  1.8 to 5.5V, incorporating functions for IEC60730 compliance, 32-bit single-precision floating point 
 +    * [[http://documentation.renesas.com/doc/products/mpumcu/doc/rx_family/r01ds0261ej0110_rx231.pdf | RX230]] family member with one CAN channel, Renesas RSCAN, 16 mbox
   * [[http://www.renesas.eu/RX600|RX600]] 165 DMIPS @ 100Mhz, IEC60730 class B,  up to three CAN channels, LQFP/LGA/BGA \\ [[http://documentation.renesas.com/doc/products/mpumcu/doc/rx_family/r01uh0041ej0090_rx63n.pdf| RX631 Manual (pdf)]] Chapter 36. CAN Module (CAN) \\ in FIFO mode the controller implements a 5 stage RX and 5 stage TX FIFO. \\ Especially the introduced RX631 micro-controllers are designed to serve space-constrained applications in 48- and 64-pin packages.   * [[http://www.renesas.eu/RX600|RX600]] 165 DMIPS @ 100Mhz, IEC60730 class B,  up to three CAN channels, LQFP/LGA/BGA \\ [[http://documentation.renesas.com/doc/products/mpumcu/doc/rx_family/r01uh0041ej0090_rx63n.pdf| RX631 Manual (pdf)]] Chapter 36. CAN Module (CAN) \\ in FIFO mode the controller implements a 5 stage RX and 5 stage TX FIFO. \\ Especially the introduced RX631 micro-controllers are designed to serve space-constrained applications in 48- and 64-pin packages.
  
   * [[http://www.renesas.eu/products/mpumcu/rx/rx600/rx64m/index.jsp| RX64M]] operates iat 2.7 to 3.6 V with up to 120 MHz. Up to 4MB Flash with 120MHz Flash access & 512KB SRAM across range, 2ch Ethernet, 3ch CAN, 2ch USB (Host, OTG)   * [[http://www.renesas.eu/products/mpumcu/rx/rx600/rx64m/index.jsp| RX64M]] operates iat 2.7 to 3.6 V with up to 120 MHz. Up to 4MB Flash with 120MHz Flash access & 512KB SRAM across range, 2ch Ethernet, 3ch CAN, 2ch USB (Host, OTG)
 +    * [[http://documentation.renesas.com/doc/products/mpumcu/apn/rx/r01an2472eu0202_rx.pdf | CAN API Using Firmware Integration Technology]], PDF document describing the latest CAN API. The manual explains the usage of this API and some of the features of the CAN peripheral for RX64M, RX71M.
  
 +  * [[ http://www.renesas.eu/products/mpumcu/rx/rx700/rx71m/index.jsp | RX71M]] Family of 32-bit micro controllers. up to 240 MHz, up to 4 MB of on-chip flash memory, 552 SRAM, 3 ch CAN, Common functions: 12-bit A/D: 29 ch (8 ch x 1 unit + 21 ch x 1 unit), SCI, SCIF, I2C, RSPI, QSPI, SDHI, MMC, SSI (serial sound interface)
 ==== R-IN family ==== ==== R-IN family ====
 +  * [[https://www.renesas.com/en-sg/products/factory-automation/ec-1.html | EC-1]] R-IN based SoC is intended for high-speed, high-precision control of slave applications that require higher CPU performance such as intelligent I/O modules equipped with EtherCAT communication functions. The SoC also comes with one CAN channel.
  
   * [[http://www.renesas.eu/press/news/2012/news20121126_s.jsp | R-IN32M3 ]] Series (Renesas Industrial Networking Engine). ARM Cortex-M3 32-bit RISC CPU + HW-RTOS (Hardware Real-Time OS) 100 MHz. 2 channels CAN. R-IN32M3-CL CC-Link IE field controller and R-IN32M3-EC EtherCAT slave controller. Suited to be used as CAN to EtherCAT or CAN to CC-Link gateway.\\ Renesas [[http://www.renesas.eu/applications/industrial_equipment/industrial_communications/r-in/index.jsp| R-IN application site]].\\ Each of the two CAN channels implements 64 message buffers. [[http://documentation.renesas.com/doc/products/assp/r18uz0007ej0300_rin32m3.pdf| R-IN32M3 Series User's Manual Peripheral Functions]](PDF)   * [[http://www.renesas.eu/press/news/2012/news20121126_s.jsp | R-IN32M3 ]] Series (Renesas Industrial Networking Engine). ARM Cortex-M3 32-bit RISC CPU + HW-RTOS (Hardware Real-Time OS) 100 MHz. 2 channels CAN. R-IN32M3-CL CC-Link IE field controller and R-IN32M3-EC EtherCAT slave controller. Suited to be used as CAN to EtherCAT or CAN to CC-Link gateway.\\ Renesas [[http://www.renesas.eu/applications/industrial_equipment/industrial_communications/r-in/index.jsp| R-IN application site]].\\ Each of the two CAN channels implements 64 message buffers. [[http://documentation.renesas.com/doc/products/assp/r18uz0007ej0300_rin32m3.pdf| R-IN32M3 Series User's Manual Peripheral Functions]](PDF)
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     * LCD Controller XGA (1024x768) with 24 bpp     * LCD Controller XGA (1024x768) with 24 bpp
  
 +==== V850 ====
 +  * [[http://www.renesas.com/products/mpumcu/v850/v850e2fx/v850e2fx4l/index.jsp|V850E2/Fx4-L]], @48 to 64 Mhz, 256KiB  to 1.5MiB FLASH, AUTOSAR, 20 different chips, very low power, selective CAN wake-up \\ [[http://documentation.renesas.com/doc/DocumentServer/R01UH0114ED0100_V850E2.pdf|Manual (pdf)]]
  
 ===== DSPs ===== ===== DSPs =====
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 ==== RS-CAN ==== ==== RS-CAN ====
  
-The module can be found on the Cortex-A9 based RZ family+The module can be found on the Cortex-A9 based RZ family, and the RH family 
 + 
 +==== RS-CANFD ====

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