Welcome to the CAN-bus Wiki project

arasan

Try to put the latest devices on top of each section and mark end-of-line products. Only specify the main parameters of the micro controllers and go more into deep with details about the CAN interface. Always try to put a link to the data sheet or manual.

arasan

SoC

FPGA / IP

Overview

Arasan announces its 2’nd Generation of CAN IP on May 2022. The CAN controller IP implements the ISO11898 (CAN2.0A, CAN2.0B) as well as TT-CAN, CAN-FD (ISO 11898-1.2015, plus earlier ISO, and Non-ISO Bosch specifications).It can be easily integrated with the host processor using standard AMBA AHB/AXI interfaces. The highly configurable controller core supports programmable Interrupts, data and baud rates, acceptance filters & flexible buffering schemes allows it to be fine-tuned to the specific need for the application. The defense and aerospace sectors in addition to automotive are a major target market for Arasan’s fault tolerant CAN IP.

CAN FD The CAN controller IP implements the ISO11898 (CAN2.0A, CAN2.0B) as well as newer high performance Non ISO CAN-FD protocols. It is compliant with ISO 11898-1:2015 DIS. The IP can be integrated into devices that require CAN connectivity commonly used in automotive and industrial applications. The ISO 11898-2.2015 version is planned for end of 2015. The IP provides an AHB-Lite slave interface for connecting to the CPU with the option of APB and it supports a 32-bit interface. Provided as Verilog HDL.

CAN XL supports CAN 2.0, CAN-FD & CAN-XL Specifications. Also supports original Bosch Protocol & ISO 11898 specifications for TTCAN (Time Triggered Operation) as specified in ISO11898-4. Easy to integrate with the Host processor using the AMBA-AXI standard interface.

Currently data sheet is available available only after registration.

8 bit Controllers

16 bit Controllers

32 bit Controllers

DSPs

Stand alone CAN Controllers


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